LIBRARY IEEE;
USE IEEE.STD_LOGIC_1164.ALL;

ENTITY PairedLatch IS
   PORT(

       );
END PairedLatch;

ARCHITECTURE pairedlatch_arch OF PairedLatch IS

COMPONENT frame_available_in_latch IS
	PORT
	(
		aclr		: IN STD_LOGIC ;
		data		: IN STD_LOGIC ;
		gate		: IN STD_LOGIC ;
		q		: OUT STD_LOGIC 
	);
END COMPONENT;

SIGNAL flip : STD_LOGIC;

BEGIN



   
END pairedlatch_arch;